VLSI Implementation of Modified Hamming Neural Network for non Binary Pattern Recognition

Abstract

Artificial intelligence is integral part of a neural network is based on mathematical equations and artificial neurons. The focus here is the implementation of the Artificial Neural Network Architecture (ANN) with on chip learning in analog VLSI for pattern recognition. It is a maximum likelohood classifier which can be implemented using VLSI. Modified Hamming neural network architecture is presented.Thenew circuit is modified to accept real time inputs as well as to determine next close pattern with respect to input pattern.Modified digit recognition circuit was simulated using HSPICE level 49 model parameters with version 3.1180n at VDD of 3V. The circuit shows power consumption of 34mW and transient delay of 0.35nS.