Design and Testing of High Speed Multipliers by using Reversible Liner Feedback Shift Register

Abstract

In recent designs of IC’s (Integrated Circuits) BIST (Built-In Self-Test) is becoming vital for memory where memory is essential part of SoC (System on Chip). BIST design technique allows circuit for self testing. A technique may provide the short test-time as compared to test which applied externally and it allows a use of the low cost test instruments throughout the all production stages. Because of LFSRs randomness properties, it requires less hardware overhead. In particular dissertation, optimization and structure design of BIST design is based on the Reversible LFSRs, which are described. As well Reversible LFSR and Proposed LT LFSR are used to design and test Architecture of different Multipliers such as Array Multipliers and Booth Multipliers