BCD To Floating Point Converter With Floating Point Adder Unit Using VHDL

Abstract

To perform numerical calculations on modern computers floating point arithmetic is a better way of approximating real number arithmetic. Its advantage is that it can support a much wider range of values rather than fixed point and integer representation. Addition/Subtraction, Multiplication and division are the common arithmetic operations. Among them the most complex one is the floating point addition. Adder is the most important element of complex arithmetic circuits, in which input should be given in standard IEEE754 format. The main objective of the work is to design and implement a binary to IEEE 754 floating point converter to represent 32 bit single precision floating point values. Then the converter will be placed at the input of the designed floating point adder module to improve the overall design. The modules are written using very high speed integrated circuit (VHSIC) Hardware Description Language (VHDL), and are then synthesized for Xilinx vertex E FPGA using Xilinx Integrated Software Environment(ISE) design suite 13.1.
DOI: 10.17762/ijritcc2321-8169.1507103