Design Of I2C Master With Multiple Slave
Main Article Content
This paper implements serial data communication using I2C (Inter-Integrated Circuit) master/slave bus controller. The I2C master/slave bus controller was designed, which act as either master or slave as per the requirement. This module was designed in Verilog HDL and simulated and synthesized in Questasim 10.0c. I2C master initiates data transmission and in order of operation slave responds to it. It can be used to interface low speed peripherals like motherboard, embedded system, mobile phones, set top boxes, DVD, PDA’s or other electronic devices.
How to Cite
, H. K. S. J. “Design Of I2C Master With Multiple Slave”. International Journal on Recent and Innovation Trends in Computing and Communication, vol. 3, no. 5, May 2015, pp. 2890-3, doi:10.17762/ijritcc.v3i5.4356.