FPGA Based Notch Filter to Remove PLI Noise from ECG
Main Article Content
in the context of heart disease ecg found to be major contributor for diagnosis purpose, always the recorded ECG signal is corrupted by different types of noise and interference due to surrounding environmental situation. Powerline noise is one of the prominent noises that corrupt and masks valuable information of ECG signal and mainly occurs when electrodes are poorly attached to the body surface or when an external source such as the sinusoidal 50Hz signal interferes with the ECG signal. Hence it is necessary to remove this powerline noise with appropriate signal processing and here it is accomplished by implementing digital FIR filter using distributed arithmetic architecture based on FPGA using Xilinx system generator with MATLAB. By comparing different types of FIR notch filter with output SNR, adders, and multipliers required for removal of power line interference, it can be analyzed that equiripple method takes more elements for computation eventually computation time is high so it is difficult to apply equiripple type digital filter on noisy ECG signal. But the Output SNR is more for equiripple and least square design. It is observed that, FPGA is more efficient than DSP as it requires less power. Also better results have been observed for FPGA as compared to DSP for real time application.
How to Cite
, M. P. B. D. “FPGA Based Notch Filter to Remove PLI Noise from ECG”. International Journal on Recent and Innovation Trends in Computing and Communication, vol. 3, no. 4, Apr. 2015, pp. 2246-50, doi:10.17762/ijritcc.v3i4.4221.