Design of Asynchronous Viterbi Decoder for Low Power Applications

Abstract

In todays digital communication systems, convolutional codes are broadly used in channel coding techniques.The viterbi decoder due to its high performance is commonly used for decoding the convolutional codes. Fast developments in the communication field have created a rising demand for high speed and low power viterbi decoders with long battery life and low weight. Despite the significant progress in the last decade, the problem of power dissapation in the viterbi decoders still remains challenging and requires further technical solutions.In this paper we proposed the methods for survivor path storage and decoding as Register Exchange Method (REM) and Hybrid Register Exchange method (HREM). REM cosumes large power and area, due to huge switching activity.The problem of switching activity of Viterbi decoder can be reduced by combining Traceback and REM and the method called Hybrid Register Exchange Method (HREM). The Viterbi decoder is designed using REM and HREM and simulated on Quartus tool and power is calculated on Power play power analyzer. As the switching activity is reduced in HREM as compared to REM the viterbi decoder achieves reduction in power in HREM as compared with REM .For further reduction in power of viterbi decoder we proposed asynchronous techniques like handshaking protocol. Here we designed the Asynchronous Viterbi decoder by using 2 phase dual rail encoding (LEDR).