Main Article Content
Recent generations of FPGAs allow run-time partial reconfiguration. One of the challenging problems in such a multitasking systems is online placement of task. Many online task placement algorithms designed for such partially reconfigurable systems have been proposed to provide efficient and fast task placement. In this paper two different approaches are being used to place the incoming tasks. The first method is uses a run-length based representation that defines the vacant slots on the FPGA. This compact representation allows the algorithm to locate a vacant area suitable to accommodate the incoming task quickly. In the proposed FPGA model, the CLBs are numbered according to Peano Space filling curve model. The second approach is based on harmonic packing. Simulation experiments indicate that proposed techniques result in low ratio of task rejection compared to existing techniques.
How to Cite
, D. S. J. (2017). Efficient Algorithms for Online Task Placement on Runtime Partially Reconfigurable FPGA. International Journal on Recent and Innovation Trends in Computing and Communication, 5(3), 19–25. https://doi.org/10.17762/ijritcc.v5i3.233