Design and Implementation of Reconfigurable Bus Protocol Translator/Convertor using FPGA
Main Article Content
In systems involving multiple peripherals with diverse bus protocols it is desirable to have a versatile reconfigurable hardware platform to translate/convert a specific protocol to minimize the complexity of system design. Especially when the number of peripherals and devices are large, it is very much mandatory to have such a hardware to deal with diverse communication protocols. These requirements give rise to the need for an reconfigurable system which can act as a bridge between two devices following different communication protocols. Communication protocols such as I2C, SPI,USB and UART protocols are commonly used protocols in hardware design. In this work, such a versatile hardware solution is proposed which would translate a basic UART protocol to I2C,SPI or USB, depending upon the communication requirement. Such a system will eliminate the complexities of protocol management to the designer and it allows them to focus on application design and development. A customized hardware is designed using Altera Cyclone-II FPGA core and the protocol bridge is tested for multiple hardware engines.
How to Cite
, R. P. “Design and Implementation of Reconfigurable Bus Protocol Translator/Convertor Using FPGA”. International Journal on Recent and Innovation Trends in Computing and Communication, vol. 5, no. 3, Mar. 2017, pp. 01-04, doi:10.17762/ijritcc.v5i3.229.