Performance Analysis of Full Adder Circuits Using CMOS 90nm Technology

Abstract

This paper represents designing of full adder circuit using CMOS 90nm technology. In this paper three full adder circuits have been proposed using 28 and 36 transistors and comparison analysis is done between 28T(a),28T(b) and 36T on the basis of area, power and number of transistors. By comparison it shows that proposed 28T(b) full adder circuit is better than 28T(a) and 36T full adder circuits as it required power less than other two circuits.