A Review - Quaternary Signed Digit Number System by Reversible Logic Gate

Abstract

A limitation is applied over the speed of latest computers while performing the arithmetic functions such as subtraction, addition & multiplication have to deal with delay in propagation. The arithmetic operations that are free of carry are attained by implementation of high level radix number system such as QSD. We suggest high speed adders constituted over QSD number system. In QSD, every digit is presented by a number in between -3 to 3. The operations on greater numbers like 64, 128 & addition that is carry free is implemented with a persistent delay & low complicacy. In this document, a reversible logic gate is implemented that is constituted over QSD. The performance of QSD adder can be improvised by invading adder based over logic gate that absorbs low power & delay.