Manchala VSR, Sahoo S, Murthy GR. Design of Hybrid Full Adder using 6T-XOR-Cell for High Speed Processor Designs Applications. IJRITCC [Internet]. 2022Dec.15 [cited 2024May3];10(1s):329-36. Available from: https://ijritcc.org/index.php/ijritcc/article/view/5900