, P. P. N. V. M. S. P. G. K. “HDL Design for Exa Hertz Clock Based 2e10-1 Exa Bits Per Second (Ebps) PRBS IP Core Generator for Ultra High Speed Wireless Communication Products”. International Journal on Recent and Innovation Trends in Computing and Communication, vol. 3, no. 1, Jan. 2015, pp. 264-7, doi:10.17762/ijritcc.v3i1.3801.