, Sruthy D, Paul Richardson Gnanaraj J. 2015. “Implementation of Low Power and Area Efficient 2-Bit/Step Asynchronous SAR ADC Using Successively Activated Comparators”. International Journal on Recent and Innovation Trends in Computing and Communication 3 (12):6577-81. https://doi.org/10.17762/ijritcc.v3i12.5098.