, Dr. R. V. Kshirsagar, Purushottam Y. Chawke. 2014. “Design of 8 and 16 Bit LFSR With Maximum Length Feedback Polynomial &Amp; Its Pipelined Structure Using Verilog HDL”. International Journal on Recent and Innovation Trends in Computing and Communication 2 (11):3337-39. https://doi.org/10.17762/ijritcc.v2i11.3465.