R.KENNADY, et al. Multi-core Tile-based Processor with Transactional Memory for Efficient Use of Resources. International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 11, n. 2, p. 215–219, 2023. DOI: 10.17762/ijritcc.v11i2.9836. Disponível em: https://ijritcc.org/index.php/ijritcc/article/view/9836. Acesso em: 20 may. 2024.