, S. S. P. B. G. USRP N210 FPGA Loop Back System. International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 3, n. 5, p. 2816–2819, 2015. DOI: 10.17762/ijritcc.v3i5.4338. Disponível em: https://ijritcc.org/index.php/ijritcc/article/view/4338. Acesso em: 28 mar. 2024.