, A. A. D. A. S. M. .R.Anitha. Power Droop Reduction In Logic BIST By Scan Chain Reordering. International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 6, n. 3, p. 80–86, 2018. DOI: 10.17762/ijritcc.v6i3.1463. Disponível em: https://ijritcc.org/index.php/ijritcc/article/view/1463. Acesso em: 6 may. 2024.