, M. K. M. P. S. M. T. Design And Analysis of 1-Bit Full Adder and Logic Gates. International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 6, n. 2, p. 73–77, 2018. DOI: 10.17762/ijritcc.v6i2.1424. Disponível em: https://ijritcc.org/index.php/ijritcc/article/view/1424. Acesso em: 16 apr. 2024.