, K. M. P. R. B. Modified Gating Techniques for Power and Speed Optimization in Arithmetic Circuits. International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 5, n. 7, p. 722 –, 2017. DOI: 10.17762/ijritcc.v5i7.1122. Disponível em: https://ijritcc.org/index.php/ijritcc/article/view/1122. Acesso em: 18 may. 2024.