, P. , N. S. C. R. An Elementary Proposal on Fault Tolerant Devices for Memory Scenario. International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 5, n. 1, p. 56–61, 2017. DOI: 10.17762/ijritcc.v5i1.87. Disponível em: https://ijritcc.org/index.php/ijritcc/article/view/87. Acesso em: 27 jul. 2024.