, S. N. M. J. K. M. N. C. Design of High Speed Carry Select Adder using Spurious Power Suppression Technique. International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 5, n. 5, p. 505–511, 2017. DOI: 10.17762/ijritcc.v5i5.551. Disponível em: https://ijritcc.org/index.php/ijritcc/article/view/551. Acesso em: 17 jul. 2024.