, S. B. D. D. Design High speed Reed Solomon Decoder on FPGA. International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 3, n. 9, p. 5371–5375, 2015. DOI: 10.17762/ijritcc.v3i9.4845. Disponível em: https://ijritcc.org/index.php/ijritcc/article/view/4845. Acesso em: 11 sep. 2025.