, P. S. K. A. P. A. P. M. A. P. P. Implementation of Power Clock Generation Method for Pass-Transistor Adiabatic Logic 4:1 MUX. International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 3, n. 6, p. 3487–3492, 2015. DOI: 10.17762/ijritcc.v3i6.4478. Disponível em: https://ijritcc.org/index.php/ijritcc/article/view/4478. Acesso em: 1 jul. 2024.