, P. A. V. P. N. A. Design and implementation of Area optimized 256 bit Advanced encryption standard on FPGA. International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 3, n. 2, p. 772–775, 2015. DOI: 10.17762/ijritcc.v3i2.3904. Disponível em: https://ijritcc.org/index.php/ijritcc/article/view/3904. Acesso em: 27 jul. 2024.