, A. T. S. G. A Literature Review on Leakage and Power Reduction Techniques in CMOS VLSI Design. International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 3, n. 2, p. 554–558, 2015. DOI: 10.17762/ijritcc.v3i2.3860. Disponível em: https://ijritcc.org/index.php/ijritcc/article/view/3860. Acesso em: 27 jul. 2024.