, A. K. S. M. M. G. M. An Area Efficient Pulse Triggered Flipflop Design under 90nm CMOS Technology. International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 2, n. 12, p. 3866–3870, 2014. DOI: 10.17762/ijritcc.v2i12.3575. Disponível em: https://ijritcc.org/index.php/ijritcc/article/view/3575. Acesso em: 16 jul. 2024.