, D. R. V. K. P. Y. C. Design of 8 and 16 Bit LFSR with Maximum Length Feedback Polynomial & Its pipelined Structure Using Verilog HDL. International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 2, n. 11, p. 3337–3339, 2014. DOI: 10.17762/ijritcc.v2i11.3465. Disponível em: https://ijritcc.org/index.php/ijritcc/article/view/3465. Acesso em: 18 jul. 2024.