, P. A. S. V. J. D. High- speed- Low-Power Viterbi Decoder Design. International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 2, n. 3, p. 417–420, 2014. DOI: 10.17762/ijritcc.v2i3.2985. Disponível em: https://ijritcc.org/index.php/ijritcc/article/view/2985. Acesso em: 27 jul. 2024.