, S. A. P. A. J. Memory Reliability Enhancement against Multiple Cell Upsets Using Decimal Matrix Code for 32-Bit Data. International Journal on Recent and Innovation Trends in Computing and Communication, [S. l.], v. 4, n. 4, p. 654–659, 2016. DOI: 10.17762/ijritcc.v4i4.2097. Disponível em: https://ijritcc.org/index.php/ijritcc/article/view/2097. Acesso em: 30 sep. 2025.