, G. B. A. N. P. H. S. K. K. S. M. R. (2015). Efficient Circuit Configuration to Reduce Comparator Requirement of 8-Bit Flash Analog to Digital Convertor. International Journal on Recent and Innovation Trends in Computing and Communication, 3(7), 4893–4895. https://doi.org/10.17762/ijritcc.v3i7.4758